Integrated Assembly–Test Control
Assembly and test are aligned across three dimensions:
Process Alignment
Package configuration, screening logic, and test coverage are defined together, not sequentially.
Data Continuity
Wafer-level data, final test results, and yield learning are correlated within a common production framework.
Ramp Discipline
Scale expansion follows demonstrated yield behaviour across both assembly and test, preventing misalignment between throughput and validation.
Leadframe & Wirebond Platforms
- QFN
- DFN
- SOT
- TO / TO-247
- IPM
- Wire Bond BGA
Flip-Chip & High-Density Platforms
- FC-QFN
- FC-BGA
- System-in-Package (SiP)
- Stack Die
Specialised Platforms
- MEMS packaging
- Photonics-based configurations
- ROSA / TOSA
Packaging Technologies
Supports automotive, power, RF, MEMS, and industrial programs requiring controlled integration.
Production Test Environment
Test operations are integrated directly within the assembly control structure.
Wafer-Level Services
- Wafer sort
- Wafer-Level Burn-In (WLBI)
- Known Good Die enablement
Final & Strip Test
- Room temperature
- Dual temperature
- Tri-temperature (-55°C to 155°C)
Power & Automotive Devices
- SiC
- GaN
- IGBT
- Power modules
Manufacturing Infrastructure
- Integrated assembly and final test operations
- Multi-line production configuration
- Phased capacity expansion
- Production governance aligned to semiconductor-grade standards
